Field of the Invention
The present disclosure relates to a display device with a reduced bezel and a driving method thereof.
Discussion of the Related Art
Display devices have been applied as a transmission medium of visual information to various information appliances or office machines. Cathode ray tubes (CRTs) or Braun tubes, the most widely spread display devices, are problematic in large weight and volume. Various types of flat panel displays that may overcome limitations of CRTs have been developed. In flat panel displays, data lines and scan lines are typically disposed to cross each other and pixels are disposed in a matrix. Video data voltages intended to be displayed are supplied to the data lines, and a gate pulse is sequentially supplied to the gate lines. As video data voltages are supplied to the pixels of a display line to which a gate pulse is supplied and every display line is sequentially scanned by the gate pulse, an image is displayed on the screen.
A gate driver for generating a gate pulse includes a level shifter and a shift register, and the shift register may be implemented in the form of a gate-in-panel (GIP) on one side of the display panel, as illustrated in FIG. 1. In order to apply a gate pulse to each of n number of gate lines, the shift register (or GIP) includes n number of stages ( . . . GIP[n−2], GIP[n−1], GIP[n]), and dummy stages (Dummy GIP1, Dummy GIP2, Dummy GIP3). Each of the stages uses an output from a previous stage as a carry signal and stops outputting the gate pulse using an output of a subsequent stage. The dummy stages stop gate pulses output by the last few stages.
Recently, as display panels have high resolution, a time for scanning one gate line is reduced, and thus, a double scan driving method, which divides the single display panel into upper and lower sections and simultaneously performs scanning in both directions, has also been used. As illustrated in FIG. 2, in a display panel driven with the double scan driving method, gate lines positioned in a central portion of the panel are scanned at the last horizontal period of one frame. Since stages GIP[n−2], GIP[n−1], GIP[n]) outputting the last scan pulses are positioned at a center of the display panel, a space for disposing dummy stages is narrow. Thus, in such a double scan driving method, the outputs of a few stages placed at the last position are stopped using separate reset signals (Vrst1, Vrst2, Vrst3).
In order to control the outputs of the stages using the reset signals (Vrst1, Vrst2, Vrst3), a plurality of signal lines for applying the reset signals (Vrst1, Vrst2, Vrst3) may need to be added. Also, the number of reset signals (Vrst1, Vrst2, Vrst3) may need to increase in proportion to the number of phases of the clock signal, and since the number of phases of the clock signal has recently been increasing due to pixel structure and driving scheme, a large number of signal lines may be required, thereby increasing the size of the bezel.